Stochastic Resonance in Gradient Descent Iterative Decoders
Speaker: Bane Vasic
Date: March 8th 2017, Wednesday
Time: 3 pm
Venue: DESE Auditorium
In the 1960s-70s, Taylor and Kuznetsov obtained a remarkable result that information can be reliably retrieved from a noisy channel even if a decoder is made of noisy components. Advances in nanotechnology and quantum computing have revived interest in noisy decoders recently a number of improvements of the iterative decoders have been made to bring their performance closer to that of their perfect counterparts.
However, a common mantra has been that noisy decoders cannot be better than their perfect counterparts. In this talk we report an unexpected phenomenon we have recently discovered-noise can actually improve the error correction process by reducing the probability of decoding error, in some cases by more that two orders of magnitude. This new form of stochastic resonance enables us to use logic gate errors to correct channel errors.
This novelty recognizes that the decoder-essentially an iterative minimization of the Bethe free energy on the code graph-can get trapped in local minima, and random perturbations help the decoder to escape from these minima and converge to a correct codeword. Crucially, such useful random perturbations require neither additional hardware, as they are built into the noisy hardware itself.
Dr. Bane Vasic is a Professor of Electrical and Computer Engineering and Mathematics at the University of Arizona and a Director of the Error Correction Laboratory.
Dr. Vasic is an inventor of the soft error-event decoding algorithm, and the key architect of a detector/decoder for Bell Labs magnetic recording read channel chips which were regarded as the best in industry. Different variants of this algorithm were implemented in virtually all magnetic hard drives.
His pioneering work on structured low-density parity check (LDPC) error correcting codes and invention of codes has enabled low-complexity iterative decoder implementations. Structured LDPC codes are today adopted in a number of communications standards and storage systems. He was a Chair of IEEE Data Storage Technical Committee and was involved in the IEEE Working Group on Error Correction Coding for Non-Volatile Memories.
Dr. Vasic’s theoretical work on graphs which has led to characterization of the hard decision iterative decoders of LDPC codes, and design of codes and decoders for binary symmetric channel with best error-floor performance known today.
He is a co-founder of Codelucida, a startup company developing advanced error correction solutions for communications and data storage. He is an IEEE Fellow and da Vinci Fellow.